Zilog Z80

History

In 1972, Intel released the first microprocessor, the 4004. This four-bit microprocessor was successful, and Intel later released an eight-bit chip called the 8008, followed by an improved version, the 8080, which had a larger instruction set and was generally more powerful than the 8008. When some of the designers of the 8080 left Intel, they formed the Zilog company and designed the Z80 microprocessor. The Z80, which was first released in July 1976, can be thought of as an improved version of the 8080. The Z80 has more than twice as many registers as the 8080, and has more than twice as many instructions. However, the Z80 kept all of the 8080's instructions. Because of this, the Z80 is software compatible with the 8080 in the vast majority of situations. This was important for the Z80, because at the time the Intel 8080 was the most popular microprocessor in the world. Because of that popularity, more software had, at that time, been written for systems using the 8080 than for ones using other microprocessors.

Due to the Z80's greater functionality and lower price, it quickly overtook the 8080 in the market. Later, it was used in many different microcomputers, such as the Timex Sinclair 1000, the Sinclair ZX81, the Osborne 1, the Radio Shack TRS-80 models I, II, and III, the Basis 108, and the Heathkit H89/Zenith Z89 and Z90. Even today, the Z80 is used in embedded systems. Its large instruction set, its large number of registers, and in general its advanced architecture (for its time) have made it the most popular 8-bit processor even today.

Packaging and pinout

The Z80 is usually packaged in a 40-pin DIP (Dual in-line package). It is an 8-bit chip that has an 8-bit bidirectional data bus and a 16 bit unidirectional address bus that allows the processor to address up to 65,536 bytes (64K) of RAM. There is also a 13-bit external control bus that contains control signals. These control signals are as follows: ~M1, which represents what cycle of an instruction the computer is in, ~MREQ, which goes low whenever the processor is accessing memory, ~IORQ, which goes low when the processor is accessing I/O devices, ~RD, which tells memory that the CPU wants to read data, ~WR, which tells memory that the CPU wants to write data, ~RFSH, which signals that the low seven bits of the address bus hold a valid 7- bit refreshed address for dynamic memories, ~HALT, which signifies that the CPU is in a Halt state and is waiting for an interrupt, ~WAIT, which signifies that another device wants the CPU to wait on it, ~INT, which is a signal to the CPU that an I/O device wants to interrupt, ~NMI, the Non-Maskable Interrupt, ~RESET, which can be used to reset the microprocessor, ~BUSREQ, Bus Request, and ~BUSAK, Bus Acknowledge. The remaining three pins are used for the clock input, power, and ground. Note that the Z80 required only a single +5 volts supply, while the 8080 required three different power supplies.

Architecture

A basic description of the Z80 CPU is as follows: The control section of the chip fetches an instruction from memory and decodes it. Most Z80 instructions are one byte. This speeds up the CPU a little bit, since only one memory access per instruction is required. The Z80 can read one instruction while decoding the next instruction, for additional time savings. The instruction is decoded into the appropriate internal control signals. This part of the architecture also handles the memory refresh.

If the instruction uses a register, that register is put on the internal data bus. A multiplexer multiplexes the blocks of registers to select the correct block. If the instruction accesses a memory location, the word at that address is fetched and put on the data bus. If the instruction uses the ALU, the value on the data bus is put into the TEMP register, and the ACU register assumes the value of the accumulator. The ALU operation is performed, and the result is stored back in the accumulator, and flags are set. As well, the program counter is incremented and the next instruction is fetched.

Registers

The Z80 contains a total of 22 registers, an improvement over the Intel 8080, which had only 10 registers. Other contemporary processors had fewer registers; for example, the 6502 had only six. On the Z80, there are six general-purpose eight-bit registers, called B, C, D, E, H, and L. These six registers can be used by themselves as eight-bit registers, or grouped into three sixteen-bit register pairs: BC, DE, and HL, to allow for 16-bit storage.

There is also an accumulator, A. The A register is always one of the operands of an arithmetical operation (that is, any instruction that uses the ALU) and also contains the output from the ALU. Although it may seem awkward to have to use the same register for arithmetic and logic operations, this functionality was common to many other microprocessors of the time. There is also an eight-bit flags register, which is usually addressed as individual bits. The flags register is updated based on the results of arithmetical operations, and also for other conditions. The flag register is eight bits in length, but only six bits in the flags register are used to represent conditions. These bits in this register are as follows: The sign bit (bit 7), which represents the sign of a signed operation, the zero bit (bit 6), which is one if both operands of an arithmetic operation were equal, the half-carry bit (bit 4, also known as the auxiliary carry), which is set to one if an arithmetic operation produced a carry between bits 3 and 4 (i.e., between the two nibbles of the result), The parity/overflow bit (bit 2), which is used to track parity or overflow, the subtract bit (bit 1), which is the same as the sign bit, and the carry bit. The carry bit is probably the bit most often used by programmers and is used to represent whether there was a carry or not in an arithmetical operation. Note that in the 8080, bit 2 is used only to represent parity. This results in the only (fairly minor) incompatibility between the 8080 and the Z80, an incompatibility that caused Microsoft BASIC to crash when first loaded into a Z80 computer. However, this problem is avoidable, providing 8080 programs only check the parity bit under certain conditions.

The registers A, B, C, D, E, F, H, and L have an alternate set. This alternate set is often denoted by a ′ (prime) suffix in assembly language (so these registers might be called A′, B′, etc.). Switching between the register bank containing B, C, D, E, H, and L and the alternate set is accomplished by using the EXX instruction (opcode D9), which switches between the two register sets. In the hardware, this is accomplished by using a multiplexer to access the register, with the control for the multiplexed being the number of the current register set in use. While the registers are switched out, they maintain their old value. In order to switch the accumulator and flags registers (A and F) with the A′ and F′ registers, the instruction EX AF, AF′ (opcode 08) is used.

There are also two sixteen-bit index registers, IX and IY. Since the Z80 uses external memory for stack storage, there is also a sixteen-bit stack pointer, which allows the stack to be located anywhere in the 64K of address space, so it may grow down to fill the entire address space, if necessary. There is also a sixteen-bit program counter to hold the address of the next instruction.

Finally, there are some miscellaneous registers. There is the R (Memory Refresh) register, which provides a seven-bit value. This value is incremented whenever the CPU fetches an opcode, and so has in some cases been used to generate pseudorandom numbers. The I (Interrupt Vector) register is an 8-bit register that points to the current interrupt page when in interrupt mode 2. There are the Z and W and the corresponding registers Z′ and W′, which are internal temporary registers. TMP and ACU are temporary registers that are the inputs to the ALU. As well, there are four single bit registers (IFF1, IFF2, IMFa and IMFb, implemented as flip-flops) which store some information about interrupt status.

Instruction set

Another improvement over the Intel 8080 by the Z80 is the instruction set. The instruction set of the Z80 consists of 158 instruction types, as opposed to 78 in the 8080 and 48 in the 8008. The number of opcodes used by the Z80 is much higher; there are 252 single-byte opcodes, with the other four remaining codes used as opcode prefixes. For example, the LD mnemonic (also known as the MOV mnemonic) represents 63 different opcodes in the Intel 8080 and 132 in the Z80. There are all of the different opcodes because of the different registers and the addressing modes being used. The Z80 instruction set can be broken into several categories: Load instructions, Exchange, Block Transfer, and Block Search instructions, Arithmetic instructions, Rotate and Shift instructions, Bit manipulation instructions, CPU Control instructions, and Program Control instructions. In each of these categories, there are several different instructions. An important thing to note is that the Z80 has ten different addressing modes: Immediate, Immediate Extended (16-bit Immediate), Modified Zero Page, Relative, Extended, Indexed, Implied, Indirect, Bit, and External, and an assembly language mnemonic may have different opcodes for each possible addressing mode for that mnemonic.

In the Load instructions category, there is the mnemonic LD, which represents 132 different opcodes, and the PUSH and POP instructions. With the Z80, may be moved to or from any of the general purpose registers or the accumulator or to a memory location specified in HL. It is also possible to move 16-bit data to or from memory to IX, IY, BC, DE, or HL. The PUSH instruction puts BC, DE, HL, AF, IX, or IY on the stack, and POP does the reverse operation. Finally, the IN and OUT (as well as INI, INIR, IND, INDR, OUTI, OUTR, OUTD, and OTDR) instructions allow input and output to I/O ports.

The Z80's Exchange instructions are EXX and EX, which are designed to switch from one block of registers to another. Its Block Transfer instructions are LDI, LDIR, LDD, and LDDR, which use BC as a counter and HL as an address. The Block Search instructions are CPI, CPIR, CPD, and CPDR, which use similar registers.

There are many different arithmetic and logic functions in the Z80. The arithmetic and logic mnemonics are ADD (add), ADC (add with carry), SUB (subtract), SBC (subtract with carry), INC (increment), DEC (decrement), AND (and), OR (or), XOR (xor), CP (compare, a form of subtraction that does not change registers, used to set flags for a jump). The arithmetic operators are available in both 8-bit and 16-bit versions. These instructions take only one operand, either a register or a memory location. The accumulator is used both as the first operand in the arithmetic and as the destination operand. There are also some general arithmetic instructions: DAA (decimal adjust after BCD add), CPL (complement accumulator), NEG (negate accumulator), CCF (toggle carry flag) and SCF (set carry flag). There are a few Rotate and Shift instructions. They are: RL, RR, RLC, RRC (R - Rotate, L - left, R - right, C - with carry), SLA (arithmetic shift left), SRA (arithmetic shift right), SRL (logical shift right), RLC, RLCA, RRCA, RRA, (for accumulator rotation), RLD, and RRD (for BCD arithmetic). Instructions to perform multiplication and division are not available on the Z80. To perform multiplication or division, repeated addition or subtraction is necessary.

One of the most powerful features of the Z80 is its ability to read or write almost any bit in any memory location or any register. The BIT instruction can test a bit and set the Zero flag to the opposite value. RES and SET instructions insert a zero or one in the specified bit position of the specified register or memory location. There are several CPU control instructions. These are NOP (no operation), HALT (halt; wait for interrupt), EI (enable interrupts), DI (disable interrupts) and IM0, IM1, IM2 (set interrupt mode).

The program control instructions are as follows: JP is a conditional jump, written in assembly language as

JP condition, address

where condition is one of NZ, Z, NC, C, PO, PE, P, or M, each of which correspond to a value of one of the flags, and address is an address to jump to relative to the current address. JR is an unconditional relative jump. To call a subroutine, the CALL instruction is used. To return from a call, the RET, RETI, and RETN instructions are used. Finally, there is the restart (RST) instruction, which uses a single-byte opcode to an address in the first page of memory.